/*;------------------------------------------------------------------------------
;-         ATMEL Microcontroller Software Support  -  ROUSSET  -
;------------------------------------------------------------------------------
; The software is delivered "AS IS" without warranty or condition of any
; kind, either express, implied or statutory. This includes without
; limitation any warranty or condition with respect to merchantability or
; fitness for any particular purpose, or against the infringements of
; intellectual property rights of others.
;------------------------------------------------------------------------------
;- File Name            : m40800.inc
;- Object               : AT91M40800 Definition File.
;-
;- 1.0 06/04/00 JPP     : Creation
;------------------------------------------------------------------------------


;--------------------------------------
;- Peripheral Identifier and Interrupt
;--------------------------------------*/

#define FIQ_ID		0       /*;- Fast Interrupt*/
#define SWIRQ_ID	1       /*;- Soft Interrupt (generated by the AIC)*/
#define US0_ID		2       /*;- USART Channel 0 interrupt*/
#define US1_ID		3       /*;- USART Channel 1 interrupt*/
#define TC0_ID		4       /*;- Timer Channel 0 interrupt*/
#define TC1_ID		5       /*;- Timer Channel 1 interrupt*/
#define TC2_ID		6       /*;- Timer Channel 2 interrupt*/
#define WDI_ID		7       /*;- Watchdog interrupt*/
#define PIO_ID		8       /*;- Parallel I/O Controller A interrupt*/

#define IRQ0_ID		16      /*;- External interrupt 0*/
#define IRQ1_ID		17      /*;- External interrupt 1*/
#define IRQ2_ID		18      /*;- External interrupt 2*/

/*;------------------------
;- Peripheral Memory Map
;------------------------*/

#define WD_BASE		0xFFFF8000      /*;- WD: Watchdog Timer Base Address*/
#define PIO_BASE	0xFFFF0000      /*;- Parallel I/O Controller Base Address*/
#define USART1_BASE	0xFFFCC000      /*;- USART 1 Base Address*/
#define USART0_BASE	0xFFFD0000      /*;- USART 0 Base Address*/

/*;- Timer Counter Base Addresses*/
#define TCB0_BASE	0xFFFE0000
#define TC0_BASE	0xFFFE0000
#define TC1_BASE	0xFFFE0040
#define TC2_BASE	0xFFFE0080

/*;--------------------------
;- Internal RAM Definition
;--------------------------*/

#define RAM_SIZE	(8*1024)
#define RAM_BASE	(0x00000000)
#define RAM_LIMIT	(RAM_BASE + RAM_SIZE)


/*;- The internal RAM is mapped at address 0x00300000 after reset until
;- Remap command is performed on the EBI.*/

#define RAM_BASE_BOOT	0x00300000

/*;-----------
;- ARM Core
;-----------*/
#include         "arm.inc"

/*;-----------------------------
;- Special Function Registers
;-----------------------------*/
#include         "sf.inc"

/*;-------------------------
;- External Bus Interface
;-------------------------*/
#include         "ebi.inc"

/*;---------------------------
;- Power Saving Controller
;---------------------------*/
#include         "ps40800.inc"

/*;--------------------------------
;- Advanced Interrupt Controller
;--------------------------------*/

#include         "aic.inc"

/*;--------------------------
;- Parallel I/O Controller
;--------------------------*/
#include         "pio.inc"

#define NB_PIO		31          /*;- Number of PIO Lines*/


/*;-------------------
;- Pin Multiplexing
;-------------------
;- PIO Controller*/

#define PIOTCLK0	0           /*;- Timer 0 Clock signal*/
#define PIOTIOA0	1           /*;- Timer 0 Signal A*/
#define PIOTIOB0	2           /*;- Timer 0 Signal B*/

#define PIOTCLK1	3           /*;- Timer 1 Clock signal*/
#define PIOTIOA1	4           /*;- Timer 1 Signal A*/
#define PIOTIOB1	5           /*;- Timer 1 Signal B*/

#define PIOTCLK2	6           /*;- Timer 2 Clock signal input*/
#define PIOTIOA2	7           /*;- Timer 2 Signal A*/
#define PIOTIOB2	8           /*;- Timer 2 Signal B*/

#define PIOIRQ0		9           /*;- External Interrupt 0*/
#define PIOIRQ1		10          /*;- External Interrupt 1*/
#define PIOIRQ2		11          /*;- External Interrupt 2*/
#define PIOFIQ		12          /*;- Fast Interrupt input*/

#define PIOSCK0		13          /*;- USART 0 clock signal*/
#define PIOTXD0		14          /*;- USART 0 transmit data signal*/
#define PIORXD0		15          /*;- USART 0 receive data signal*/

#define PIOSCK1		20          /*;- USART 1 clock signal*/
#define PIOTXD1		21          /*;- USART 1 transmit data signal*/
#define PIORXD1		22          /*;- USART 1 receive data signal*/

#define PIOMCK0		25          /*;- Master Clock Output*/
#define PIONCS2		26          /*;- Chip Select 2*/
#define PIONCS3		27          /*;- Chip Select 3*/
#define PIOCS7		28          /*;- Address 20/Chip Select 7*/
#define PIOCS6		29          /*;- Address 21/Chip Select 6*/
#define PIOCS5		30          /*;- Address 22/Chip Select 5*/
#define PIOCS4		31          /*;- Address 23/Chip Select 4*/

/*;---------
;- USARTs
;---------
;- Definition file*/
#include         "usart.inc"

/*;-----------
;- Watchdog
;-----------
;- Definition file*/
#include         "wd.inc"

/*;----------------
;- Timer Counter
;----------------*/
#include         "tc.inc"

/*                END*/
